1. Technical Field
The present invention relates to the field of frequency synthesis, and more particularly to frequency synthesis with high spectral purity.
2. Description of the Prior Art
It is recalled here that frequency synthesis is the technique of generating a signal oscillating at an adjustable frequency with high precision and high spectral purity. Frequency synthesis is very widely used in different areas of electronics, for example in radio and TV signal broadcast and reception, telecommunications, instrumentation, clock signal generation, etc.
At present, frequency synthesis is generally produced from one or several circuits known as phase locked loops (PLL). In this case, the synthesis is xe2x80x9cindirectxe2x80x9d, inasmuch as the signal produced at the output is generated by an oscillator different from the reference source.
A PLL circuit can produce at its output a signal which is variable by frequency jumps from a signal of fixed frequency, referred to as the reference frequency.
FIG. 1 is a diagram which shows schematically the main elements that form a classical PLL circuit. The above-mentioned reference frequency Fref is produced by an oscillator circuit 4 whose time base is generally a quartz crystal 6. The signal at the frequency Fref is sent to a first comparison input C1 of a phase comparator 8 via a divider 9 programmable for the reference frequency; the second comparison input C2 of the phase comparator 8 receives the output signal from a voltage controlled oscillator (VCO) 12 after a frequency division by a factor N, as shall be explained further.
The programmable divider 9 allows to select the exact desired frequency at input C1 of the phase comparator 8 as a function e.g. of the frequency plan established for the oscillating system into which the PLL circuit is integrated. Its function is to divide the frequency Fref at the input by a programmable factor R, where R is an integer or a fraction. The frequency at the output of the divider 9 is thus Fref/R.
The pulse-like signal at the output S of the phase comparator 8, after integration by a low-pass filter 10, appears in the form of a voltage whose magnitude is proportional to the phase difference between the signals applied at the first and second comparison inputs C1 and C2.
The low-pass filter 10 serves to integrate the current or voltage fluctuations arising from the phase comparison performed by the comparator 8, so that the oscillator 12 can correctly follow the evolutions of that signal while complying to the stability criteria according to the theory of feedback controlled systems.
The pulse-like voltage or current is first supplied to a low-pass filter 10, and thereafter to the voltage-controlled oscillator 12. The latter produces a signal whose frequency F1 is proportional to this control voltage and which, in the circuit considered, also constitutes the output frequency F1 of the PLL.
A feedback of this output signal from oscillator 12 to the phase comparator 8 passes through a frequency divider 14, such that the signal supplied at the second comparison input C2 of the comparator 8 has a frequency equal to F1/N at the feedback, where N is an integer or a fraction.
The phase comparator 8 thus produces at its output S a signal whose magnitude is proportional to the phase difference between this signal of frequency F1/N and the phase of the reference signal, possibly after a frequency division by the divider circuit 9. It shall be understood that when N is varied by programming, the oscillator 12 shall see its frequency vary correspondingly up to the point where the two comparison signals are in phase.
When this condition is reached, the loop is in the stable mode and we have, at the level of the comparator, the identity F1/N=Fref/R. Thus, the frequency F1 at the output is N/R times Fref. The PLL equation is stable for Fref/R=F1/N, whence an output frequency of: F1 =(N/R)Fref.
By programming the values N and R, it is possible to obtain, from the reference signal of fixed frequency Fref, a range of frequencies of which each frequency is an integral or fractional multiple of that reference frequency. The reference frequency Fref therefore establishes the resolution in frequency variation, the latter only occurring in jumps of Fref or Fref(N/R).
There also exists another frequency synthesis technique which is known as direct digital synthesis (DDS). This approach consists in mathematically constructing, in an autonomous fashion, a signal having a desired waveform (generally sinusoidal) by directly calculating trigonometrical values for each phase angle increment of the signal considered. Such a circuit shall be briefly described with reference to FIG. 2.
The calculation of these trigonometrical values is performed by a direct digital synthesis block formed by a trigonometrical calculation unit 22. This unit operates in synchronous binary logic from a clock signal Sh supplied by an oscillator circuit 4 which can be of the same type as presented in the context of FIG. 1. Each digital sample thus obtained is then transformed into a voltage value using a digital-to-analog converter 24. The evolution of this voltage in concert with the execution of the successive calculations reproduces the desired waveform at the desired frequency Fsynth. Generally, each calculation of a trigonometric value for a given angle is performed in pace with a cycle of the clock Fh of the oscillator circuit 4. Also, to obtain a signal having good resolution, it is necessary to dispose of a relatively dense number of calculation points for each cycle reproduced. According to the theory of sampled systems, the clock frequency Fh must be higher than the frequency of the reproduced signal Fdds, the optimization typically being obtained when the clock signal frequency is greater by a factor at least equal to three times that frequency.
Nowadays, with digital architectures becoming increasingly integrated, direct digital synthesis is technically and economically feasible, but it is implemented in conjunction with indirect synthesis to offer solutions that meet frequency synthesis requirements of the new telecommunications systems, which are always demanding as regards spectral quality and frequency resolution, as well as in precision and frequency stability.In this context, indirect synthesis uses frequency transposition architectures with interlocked PLLs in view of minimizing phase noise at the output. These loops are difficult to implement as regards both feedback stability criteria and spurious spectral spikes. Moreover, the practical aspects of their construction pose problems, especially as regards presetting the oscillators so as to be in the capture range. This problem is linked to the narrow bandwidth of beats at the outputs of mixers associated with the phase comparators. The beat frequencies used are moreover undesirable at the spectrum output. It is also necessary to manage an approach voltage for the output oscillator. Consequently, achieving a frequency synthesis calls for a compromise to be made between a high comparison frequency, a small increment resolution, a high frequency acquisition speed, and an adequate band coverage at the output, requiring the use of broadband oscillators. These problems of frequency synthesis shall now be described in the context of a concrete example based on a digital radio or TV transmitter in the UHF band. Efforts in this field are directed to digital modulation transmission systems for both television and radio. Compared to analog transmissions, digital technology allows a much denser occupation of the spectrum and a greater immunity to noise and interference problems. As regards radio frequency broadcasting, present day digital TV and radio broadcasting programs (also known as DAB or DVBT respectively for digital audio broadcasting and digital video broadcasting terrestrial) aim to exploit the UHF IV and V and VHF band III carrier frequency bands.
The modulation technique envisaged is coded orthogonal frequency division multiplex (COFDM). This protocol is used in particular for use in the European standards.
Such a modulation technique is in itself well known, being described notably in patent documents EP-A-0 902574 and WO-A-98 11698. Only the basic concepts shall be recalled here, with reference to FIG. 3.
This simplified diagram shows the functional blocks which enable a phase quadrature modulated analog signal to be produced from two input signals I and Q. The two signals carry modulated information and are modulated in quadrature. These signals are supplied at inputs of respective mixers 30, 32 which also receive signals from a phase shifter 31. The latter receives at an input a signal at the frequency Fsystem established for the system. The two respective mixers 30, 32 thus supply digital signals which are sent to the respective inputs of an adder circuit 34. The output S(t) of the mixer 34 is a time-varying trigonometrical function given by: S(t)=I cos xcfx89xcfx84xe2x88x92Q sin xcfx89xcfx84, where I and Q are numerical coefficients, xcfx89 is the phase angle, and xcfx84 is time.
Signal S(t) is generally a signal comprising a large number of carriers, for example 6817 carriers on a 7.61 MHz band, as shown by FIG. 4. This signal comprises a central frequency denoted Fnum positioned at a frequency on the order of 18 MHz.
Before this signal can be power amplified, it is first necessary to transpose the frequency Fnum to a higher frequency in the UHF band. To do this, the current solution is a two-stage transposition, as shown schematically in FIG. 5. The different points of the circuit of FIG. 5 are identified by references (a) to (d); the signals at these reference points are shown in FIG. 6, which is a graph showing frequency along the x-axis and signal level along the y-axis.
Signal S(a) at central frequency Fnum is processed by a classical two-stage transposition heterodyne circuit 50. The signal at the input (a) passes through a first mixer circuit 52 where it is mixed with a signal OL1 having a fixed frequency Fol1 greater than the frequency Fnum. This mixer circuit 52 produces two spectra S1 and S2 at its output (b) (FIG. 6) from the signal of mixture OL1, corresponding respectively to the difference and the sum of the mixed frequencies. These two spectra are separated by a first band-pass type filter 54 which only passes on the frequency spectrum S2 of the upper mixed frequency (c). Because the two spectra are very close in frequency, this separation must be performed by a very selective filter. A surface acoustic wave (SAW) filter is generally used for that purpose. This spectrum is then applied at the input of a second mixer 56 which also receives as an input a signal OL2 at a mixing frequency Fol2 greater than Fol1. As for the first mixer circuit 52, the second mixer circuit 56 yields two spectra S3 and S4 respectively corresponding to the difference and sum of frequencies passed by the first filter 54 and the signal of frequency Fol2.
Frequencies Fol1 and Fol2 of signals OL1 and OL2 are selected so that the upper frequency spectrum S4 corresponds to the desired frequency band (viz UHF band IV or V in the example considered).
This spectrum S4 is kept while eliminating the other spectrum S3 by a second band-pass filter 58.
The second filter 58 is fixed in frequency. In other words, it selects just one frequencyxe2x80x94or narrow range of frequenciesxe2x80x94by eliminating all the others. This filter is thus selected to be tuned to the desired output frequency.
The problem which arises in this context lies in synthesizing the frequencies Fol1 and Fol2 by the signals OL1 and OL2 for the transposition oscillators required for the transposition. This implies two changes in frequency of a signal modulated and centered around a frequency Fnum to generate the modulated signal centered at a frequency in the band for covering the UHF or VHF frequency bands used in TV broadcasting (band III in VHF and bands IV and V in UHF).
The frequency increments must be small (1 Hz) with a frequency precision tolerance less than or equal to 0.5 Hz. The invention allows to achieve a precision of 0.1 Hz. The phase noise must be within a spectral template in accordance with the recommendations of the European project xe2x80x9cValidatexe2x80x9d in complement to the ETS300 744 standard defining the COFDM for DVB-T, which figures in table I below.
In view of these different problems, a first object of the present invention is to propose a frequency synthesis circuit comprising a direct digital synthesis device for producing by calculation a signal oscillating at a determined frequency, the calculation being performed by a logic circuit clocked by a clock signal having a determined clock frequency, characterized in that it further comprises transposition means for transposing the signal which oscillates at the determined frequency using the clock frequency signal, the signal thus transposed being supplied as an output.
Preferably, the frequency transposition is performed by summing means for summing the clock frequency and the determined frequency outputted from the direct digital synthesis device.
In this case, the summing means can comprise a mixer having a first input for receiving the oscillating signal produced by the direct digital synthesis device, a second input for receiving the clock signal and an output supplying the sum and the difference of the frequencies of clock signal and the oscillating signal outputted by the direct digital synthesis device.
Advantageously, the circuit further comprises filtering means (for example a band-pass filter) for filtering the oscillating signal outputted from the direct digital synthesis device upstream of the transposition means.
In a preferred embodiment, the direct digital synthesis device comprises a direct digital synthesis unit producing digital numbers corresponding to trigonometrical values of successive phase angles, comprising a memory for a sinusoidal waveform, and a digital-to-analog converter for converting the values into analog voltages, the converter being clocked by the clock signal from the oscillator.
Still in a preferred embodiment, the circuit comprises an oscillator which produces the clock signal at a frequency on the order of 10 MHz.
In this case, the frequency produced by the direct digital frequency synthesis device is on the order of 2.25 MHz, so that, after transposition by the frequency, the signal at the output is on the order of 12.25 MHz.
Another object of the invention is to propose a frequency transposition device comprising:
at least one phase locked loop means delivering at an output a signal of intermediate frequency from a reference frequency signal having a predetermined frequency;
frequency transposition means comprising an input for a signal to be transposed, an output for a signal transposed in frequency and at least one input for an intermediate frequency signal connected to a respective output of the phase locked loop means;
characterized in that the reference signal is supplied by the output of a frequency synthesis circuit according to any one of the characteristics described in connection with the first object of the invention.
The or each phase locked loop can comprise a programmable divide by R (or T) means operative on the frequency of the reference signal, where R (or T) is an integer or a fraction.
The frequency transposition means can comprise, for the or each phase locked loop, a mixer having a first input for receiving either the input signal to be transposed, or an intermediate transposition of that signal, and a second input for receiving a signal of intermediate frequency from a respective phase locked loop, and an output for the mixture of the frequencies of the signals.
Preferably, the phase locked loop means comprises a number k of phase locked loops, where k is an integer greater than 1, each receiving in a symmetrical and balanced manner the reference signal at an input. This number k is advantageously equal to 2, especially for frequency transposition applications involving a double transposition.
In a preferred embodiment, one of the mixers receives at its first input the input signal to be transposed and supplies at its output a signal which is applied to the first input of a mixer located downstream, via a band-pass filter.
Preferably:
the clock frequency of the oscillator is on the order of 10 MHz;
the reference frequency of the signal produced by the frequency synthesis circuit is on the order of 12.25 MHz;
a first of the phase locked loops serving to produce the signal for a first mixer has a frequency on the order of 120 MHz;
a second of the phase locked loops serving to produce the signal for a second mixer has a frequency on the order of 330 to 720 MHz.
A further object of the invention is the use of a circuit of the above type for the transposition of a modulated signal for transmission, to a VHF or UHF frequency range.
Note that the present invention also makes it possible to produce the reverse function, i.e. it can have for object the use of a circuit described above for the downward transposition of a signal modulated in the VHF or UHF frequency range to a low frequency modulated signal.
Another object of the invention is the use of a circuit as described above for driving a power amplification circuit of a transmitter with a modulated signal transposed in frequency.
The invention can also constitute a method of frequency synthesizing at a frequency not modulated at an output by transposing a non-modulated signal Fnum, for example the frequency Fh.
Another object of the present invention is a method of frequency synthesizing using a direct digital synthesis device serving to produce by calculation a signal oscillating at a determined frequency, the calculation being performed by a logic circuit clocked by a clock signal having a determined clock frequency, characterized in that the signal oscillating at the determined frequency is transposed by the frequency of the clock signal, the signal thus transposed being supplied as an output.
Finally, the invention concerns a method of transposing a frequency using a circuit comprising:
at least one phase locked loop means delivering at an output a signal of intermediate frequency from a reference frequency signal having a predetermined frequency;
frequency transposition means comprising an input for a signal to be transposed, an output for a signal transposed in frequency and at least one input for an intermediate frequency signal connected to a respective output of the phase locked loop means;
characterized in that the reference signal is supplied in accordance with a frequency synthesis method according to any one of claims.
It is to be understood that all the optional characteristics having been set forth in the context of the circuits according to the invention apply mutatis mutandis to the method set out above; the same shall apply to the description which follows of preferred embodiments.